bsc : Bluespec high level hardware design language compiler ( https://github.com/B-Lang-org/bsc )
open_pdks : PDK installer for open-source EDA tools and toolchains ( https://github.com/RTimothyEdwards/open_pdks )
skywater-pdk : Open source process design kit for usage with SkyWater Technology Foundry's 130nm node ( https://github.com/google/skywater-pdk )
verible : SystemVerilog parser, style-linter, and formatter ( HOMEPAGE=" )
verilator : The fast free Verilog/SystemVerilog simulator ( HOMEPAGE=" )
Add an ebuild in portage :
The ebuild is now in the portage tree.
You can also use layman : emerge layman then layman -a guru
For Paludis use this rsync : rsync://gentoo.zugaina.org/guru-portage
If you have a problem : ycarus(-at-)zugaina.org